Synthesizable Analog Generators

Synthesizable analog blocks are implemented using an auxiliary cell based design. Once the required auxiliary cells are available for a particular process design kit, they can be used as part of standard digital synthesis flow allowing the automation of analog block generation. The analog block generator tools developed here are technology agnostic Python-based circuit design platforms.  The analog generators available as part of FASoC project are given below:

  1. AD-PLL
  2. ADC
  3. CDC
  4. DC/DC Converter
  5. Digital LDO
  6. Memory Generator
  7. Thermal Sensor